1. Field of the Invention
The present invention relates generally to a method and circuit for executing a self test in an integrated circuit, and more specifically to a built-in self test for a counter system, such as a real-time clock, in an integrated circuit.
2. Description of the Prior Art
A counter is a frequently used circuit in computers, control systems, and other electronic devices. Generally, a counter has a register whose contents step through a regular series of states, which are usually states indicating consecutive integers. The counter is typically incremented by a clock signal, wherein the rising or falling edge of the clock transition causes the counter to change from one state to another. A counter may also be set or loaded with an initial value by writing data into the counter register, or by activating a reset function in the counter.
A counter circuit frequently includes an output signal, called a “carry out,” that indicates that the counter has reached its maximum value, and that the next counter value will “rollover” to begin counting from an initial value. For example, a counter having two decimal digits may count from 00 to 99, and then roll back over to 00 at the next counter increment. The carry out signal is used to cascade a series of counters in order to make a counter system comprised of several counters, wherein the counter system may count to larger numbers through the aggregation or cooperation of a plurality of smaller counters.
For example, with reference to FIG. 1, there is depicted a counter system 20, which is known in the prior art. Counter system 20 includes a plurality of cascaded counters that cooperate in a system that may be used in a controller to keep track of various quantities, or that may be used to control stages or modules in a computer controlled process. In the specific example depicted in FIG. 1, counter system 20 is used to implement a real-time clock, which keeps track of a plurality of units of time.
As illustrated, counter system 20 includes century counter 22, year counter 24, month counter 26, day counter 28, hour counter 30, minute counter 32, second counter 34, and millisecond counter 36. All counters 22–36 are based on an up-counter logic. In normal operation, millisecond counter 36 is incremented by clock 38, which in the real-time clock has a frequency of 1,000 Hz, and is typically derived from a crystal oscillator. Millisecond counter 36 counts from an initial value to 999, where the initial value may be written into a register within millisecond counter 36. Once millisecond counter 36 reaches its maximum count value of 999, millisecond counter 36 makes carry-out signal 40 active, which becomes a signal indicating to second counter 34 that it should be incremented by 1 at the next clock transition, as millisecond counter 36 rolls over to 000. Thus, carry out signal 40 is active during the period when millisecond counter 36 has reached its maximum value before it rolls over to an initial value.
In a real-time clock system of counters, some counters have an initial counter value of 0 and count to a full decimal count of 99 or 999. For example, century counter 22 and year counter 24 each count from 00–99, and millisecond counter 36 counts from 000–999. When year counter 24 reaches 99, year carry out signal 52 is active.
Other counters in the real-time clock do not rollover at the full decimal count. For example, seconds counter 36 and minutes counter 32 both rollover after reaching a maximum count of 59, which means that second carry out 42 and minutes carry out 46 will be active at their respective maximum count values. Hour counter 30 rolls over after a full count of 23, which is when hour carry out 46 is active. Day counter 28 has a maximum count value that depends upon values in the current month and year counter counters, wherein the maximum day count can have values of 28, 29, 30, or 31. Whatever the current maximum count may be, when day counter 28 reaches that value, day carry out signal 46 will be active. Most counters in counter system 20 roll over to an initial counting value of 0, but day counter 28 and month counter 26 each roll over to an initial value of 1.
During the manufacture of integrated circuits containing counter systems, it is necessary to test clock functions to insure the functioning and the quality of the part. Integrated circuits frequently include built-in tests that allow an integrated circuit to test at least a portion of its functions internally, and to report any error conditions so that the part may be repaired or scrapped.
When designing a built-in self test, minimizing the time required to perform the test is an important design goal. For example, to increment the real-time clock millisecond-by-millisecond over a number of counts representing 100 years would take a very long time, even if a test clock was faster by many orders of magnitude than the 1,000 Hz clock used in normal operation. Further complicating the task of designing a fast and efficient built-in self test is the fact that several counters in the system may have different numbers of digits, and many counters may have different rollover points.
Therefore, it should be apparent to those persons skilled in the art that a need exists for an improved method and system for testing a clock system having a plurality of cascaded clocks, wherein the improved test has the advantage of incrementing and testing a substantial number of the counting states of the clock system in a short period of time, despite the fact that various counters may have different numbers of digits, different rollover points, and different initial counting values following a rollover.